張裕鑫 助理教授 (Yu-Hsin Chang)

 一、基本資料

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•  職    稱：助理教授

•  最高學歷：國立中興大學電機工程博士

•  聯絡電話：05-6315559

•  傳真電話：05-6315643

•  電子郵件：yhchang@nfu.edu.tw

 二、教學與服務經歷

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•  現    職：國立虎尾科技大學 電子工程系 助理教授 (2018/02~迄今)

•  經    歷：國家晶片系統設計中心 助理研究員 (2015/09~2017/09)

茂德科技 良率提昇工程師 (2007/01~2009/06)

瑞佑科技 數位IC設計工程師 (2003/06~2004/11)

九暘電子 系統設計工程師 (2001/11~2003/06)

朝陽科技大學 資訊工程系 兼任講師 (2014/02~2015/01)

國立勤益科技大學 電子工程系 兼任講師 (2009/08~2014/07)

朝陽科技大學 資訊工程系 兼任講師 (2011/02~2012/01)

 三、專長

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•  射頻積體電路設計 (RF Integrated Circuit Design)

•  混合信號積體電路設計 (Mixed-Signal Integrated Circuit Design )

•  低功耗無線應用系統晶片設計 (Low-Power Wireless Application SoC Design)

•  光通訊積體電路設計 (Optical Communication Integrated Circuit Design)

•  電子電路應用設計 (Electronic Circuit Application Design)

 四、相關計畫

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•  科 技 部：

1.  應用於5G新穎式低功耗頻率合成器設計 (2018.12.01~2019.11.30)

•  產學合作：

 五、論文發表

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•  國內外期刊論文：

1.  Y. C. Chiang, and Y. H. Chang, “A 60 GHz CMOS VCO using a fourth-order resonator,” IEEE Microwave and Wireless Components Letters, vol. 25, no. 9,pp 609-611, September 2015. (SCI)
2.  Y. H. Chang, Y. C. Chiang, and C. Y. Yang, “A 42.15-68.35 dBΩ tunable gain transimpedance amplifier using 0.18-µm CMOS process ,”Microwave and Optical Technology Letters, vol. 57, no. 4, pp. 830-832, April 2015. (SCI）
3.  Y. H. Chang, Y. C. Chiang, and C. Y. Yang, “A V-band push-push VCO with wide tuning range using 0.18 µm CMOS process,” IEEE Microwave and Wireless Components Letters, vol. 25, no. 2, pp. 115-117, February 2015. (SCI)
4. C. Y. Huang, Y. H. Chang, and Y. C. Chiang, “A down-conversion mixer using 90-nm CMOS process for 60-GHz applications,” Microwave and Optical Technology Letters, vol. 56, no. 10, pp. 2456-2458, October 2014. (SCI) 

•  國內外研討會論文

1. Y. H. Chang,    and  Y.    C.   Chiang,       “A novel injection-locked frequency tripler for V-band applications,” in 14th European Microwave Integrated Circuits Conference, Paris, France, pp. 290-293, September 2019.
2. Y. H. Chang,    and  Y.    C.   Chiang,       “A novel K-band divide-by-4 injection-locked frequency divider,” in 2018 Asia-Pacific Microwave Conference, Kyoto, Japan, pp. 264-266, November 2018.
3. Y. H. Chang, and Y. C. Chiang, “A low-power K-band divide-by-5 injection-locked frequency divider,” in 46^th European Microwave conference, London, UK, pp. 289-292, October 2016.
4. Y. H. Chang, and Y. C. Chiang, “A dual V-band push-push VCO using the 0.18µm CMOS process technology,” in Progress in Electromagnetics Research Symposium, Prague, Czech Republic, July 6-9, 2015.
5. Y. H. Chang, and Y. C. Chiang, “A divide-by-3 injection-locked frequency divider in 0.18 µm CMOS process for K band Applications,” IEEE MTT-S International Microwave Symposium, Phoenix, Arizona, USA, May 17-22, 2015.
6. Y. H. Chang, and Y. C. Chiang, “A V-band push-push VCO with wide tuning in 0.18 µm CMOS process,” in 44^th European Microwave conference, Rome, Italy, pp. 584-587, October 2014.
7.  Y. H. Chang, and Y. C. Chiang, “A dual-band push-push VCO using 0.18µm CMOS process for V-band applications,” in The 25^th VLSI Design/CAD Symposium European, Taichung, Taiwan, August 5-8, 2014.
8. Y. H. Chang, Chia-Yang Huang, and Y. C. Chiang, “A 24GHz down-conversion mixer with low noise and high gain,” in 7^th European Microwave Integrated Circuit Conference, Amsterdam ,The Netherlands, pp. 285-288 ,October 2012.
9. Y. C. Chiang, and Y. H. Chang, “A Back-Gate Coupling QVCO with Kvco Linearization Technique,” in IEEE International Symposium on Radio-Frequency Integration Technology, Singapore, Dec. 9–11, 2009. 

 六、特殊事蹟

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•  專利：

1. 張裕鑫等。疊接雙交叉耦合對電晶體之除三注入鎖定除頻器電路(中華民國專利)，2016。

•  CIC訓練課程講師：

1. 張裕鑫, Mixed-Signal IC Implementation and Verification (2015.09~2017.09)。

•  技術報告：

1. 張裕鑫,“使用FastSPICE模擬軟體CustomSim應用於積體化電路設計,”第200期CICeNEWS (國家晶片系統設計中心電子報), July 2017.

•  教科書審查:

1. 國家教育研究院108年技術型高級中等學校電機與電子群教科用書審查人

•  專題演講:

1. IC人生經歷談,國立雲林科技大學電子工程學系,2018.06.15.
2. 使用FastSPICE工具應用於積體電路設計,國立嘉義大學電機工程學系, 2018.05.09.

•  學會會員:

1. 台灣電磁產學聯盟學界會員,2021.02.23~迄今
2. 台灣積體電路設計學會會員,2021.06.01~迄今